Phoenix - Your AI AssistantWant to implement Envelope detection inside FPGA using VHDL/Verilog
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Experience Level: Expert
General information for the business: Project
Description of requirements/functionality: Knowledge in Signal processing, VHDL, FPGA.
Extra notes: I want to implement Envelope detection inside the FPGA. I am using Artix 7 Ac701 evaluation board for testing. I will receive the modulated signal as shown in pictures and directed to ADC and the ADC output will be the input to envelope detector design logic inside the FPGA.
Description of requirements/functionality: Knowledge in Signal processing, VHDL, FPGA.
Extra notes: I want to implement Envelope detection inside the FPGA. I am using Artix 7 Ac701 evaluation board for testing. I will receive the modulated signal as shown in pictures and directed to ADC and the ADC output will be the input to envelope detector design logic inside the FPGA.
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