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Experience Level: Intermediate
http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.14.2355
i want to implement an address bus compression as explained in the section two of this paper. Specifically this part as i explain below.
Step1: Consider a scheme with a 64 entry encoding table
Step 2:The system with address bus compression is based on
18 low-order bits and 18 high-order bits. The low order bits
are transmitted directly. The high order bits are looked up in a
64-entry encoding table. If the entry is found (table hit), only
a 6-bit index to the decoding table need be transmitted for the
high-order part. Thus a 24-bit address bus suffices.
i want to implement an address bus compression as explained in the section two of this paper. Specifically this part as i explain below.
Step1: Consider a scheme with a 64 entry encoding table
Step 2:The system with address bus compression is based on
18 low-order bits and 18 high-order bits. The low order bits
are transmitted directly. The high order bits are looked up in a
64-entry encoding table. If the entry is found (table hit), only
a 6-bit index to the decoding table need be transmitted for the
high-order part. Thus a 24-bit address bus suffices.
Divya B.
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