It is a project that needs to be get done in Multism APP

Shift Register Counters and Logic Analyzer

In this problem, you have to build the specified shift register counters in Multisim and display the output waveforms on a Logic Analyzer.

The first one is an 8-stage Johnson counter. You built a 6-stage one in Virtual Lab 6, so it should not be a problem. But this time you have to connect all eight outputs to Logic Analyzer so you may get a display of all the waveforms at a glance.

Provide a screenshot of the circuit only, and a separate one for the Logic Analyzer window, clearly displaying all the digital waveforms.

The second one is the 10-bit ring counter, which is shown in Example 8-5. The logic diagram for a simple ring counter is shown in Figure 8-24. However, if we want to start with a given initial state, then we will have to use flip-flops that allow direct loading of the initial value.

Build the ring counter in Multisim, and get it going with an initial value of 0110010000. Provide a screenshot of the circuit only, and a separate one for the Logic Analyzer window, clearly displaying all the digital waveforms.

Completing the Chapter 4 Applied Logic Activity

This problem involves completing the Chapter 4 applied logic activity, “Seven Segment Display.” It is described on pages 230 to 234 in the electronic version of the textbook. You may skip the VHDL part.

Open file AL04 in the Applied Logic folder on the website. Run the simulation on the decoder and display using your Multisim software. Observe the operation for the specified letters.

Write a summary of your observations. Provide solutions for the 14 exercises in the activity.

Design a Binary Counter with Irregular Binary Count Sequence

Design and test a binary counter with an irregular count sequence as shown below:

001 - 011 - 100 - 110 - 001

You will have to follow the six step procedure explained in Chapter 9 and demonstrated in Example 9-4. The states 0, 2, 5, and 7 are invalid states.

After the counter has been designed and implemented, you have to also verify its correct operation, as you did in Experiment 3 of Virtual Lab 6, for Example 9-4.

Design and implementation must be fully documented following Example 9-4. Verification should follow the procedure and documentation used in Experiment 3 of Virtual Lab 6.

Completing the Chapter 6 Applied Logic Activity

This problem involves completing the Chapter 6 applied logic activity, “Traffic Signal Controller: Part 1.” It is described on pages 351 to 357 in the electronic version of the textbook. You may skip the VHDL part.

Open Multisim file AL06 in the Applied Logic folder on the website. Run the simulation for the combinational logic unit of the traffic signal controller and observe the operation for each of the four states in the light sequence.

Write a summary of your observations. Provide solutions for the 9 exercises in the activity.

Completing the Chapter 7 Applied Logic Activity

This problem involves completing the Chapter 7 applied logic activity, “Traffic Signal Controller: Part 2.” It is described on pages 415 to 422 in the electronic version of the textbook. You may skip the VHDL part.

Open the Multisim file AL07 in the Applied Logic folder on the website. Run the traffic signal controller simulation using your Multisim software and observe the operation. Lights will appear randomly when first turned on. Simulation times may vary.

Write a summary of your observations. Provide solutions for the 7 exercises in the activity.

Completing the Chapter 8 Applied Logic Activity

This problem involves completing the Chapter 8 applied logic activity, “Security System.” It is described on pages 466 to 472 in the electronic version of the textbook. You may skip the VHDL part.

Open File AL08 in the Applied Logic folder on the website. Run the security code logic simulation using your Multisim software and observe the operation. A DIP switch is used to simulate the 10-digit keypad and switch J1 simulates the # key. Switches J2-J5 are used for test purposes to enter the code that is produced by the code selection logic in the complete system. Probe lights are used only for test purposes to indicate the states of registers A and B, the output of the comparator, and the output of register C.

Write a summary of your observations. Complete the 4 exercises in the activity.