- Helensvale, AU
- $30 /hr
- Available now
I am an ATE test engineer with 20+ years of experience. I have worked on both Software and Hardware test solutions for high end characterization and high volume manufacturing.more...I am an ATE test engineer with 20+ years of experience. I have worked on both Software and Hardware test solutions for high end characterization and high volume manufacturing. I have most recently worked in the micro-electronics industry developing test solutions for cell phone hardware applications. I have worked at both the ASIC and system level in various roles.
Area Covered: Any
Work Experience Summary: 2009-present VLSI Test Services LLC, Sole Proprietor
Formed ATE test engineering services consulting company. Licensed and bonded in the US and Australia. Can provide full project management and engineering services for qualification, characterization and release to high volume manufacturing for all types of complex ASIC devices.
2008-2009 Nano Integrated Services Inc, Senior Applications Engineer
Developed a test solution for a 6.25G/it Fabric Manager test program using the Verigy PinScale HXA test solution. The test solution included 4 x SPI-4.2 interfaces and 18 x SerDes links each with a Tx/Rx cml pin pair. Also responsible for several RF test solutions using the Verigy PortScale. Specifically a XM Satellite Radio tuner operating at 3.125GHz designed for both Cell and Radio applications and an advanced RFID tag reader/writer operating in the UHF range. (860-960MHz). I am also given several RF training coerces for Verigy and Nano customers.
2006-2008 Fyrestorm Inc, Senior Test and Product Engineer
Brought up the test environment for an advanced power management controller. This chip required an internally developed test solution using a Virtex-II FPGA. Initial development was on a Xilinx ML310 development board followed by a custom production loadboard that required no ATE. All software development was done using Xilinx Platform Studio and SynplifyPro. I received an innovators award 60 days after hire date for solutions surrounding this objective.
2000-2006 CISCO Systems, Technical Leader
Developed mixed signal and RF test programs on the Catalyst Gen III ATE test systems. Responsible for the 802.11a/b/g family of wireless devices. Developed test strategies on the Agilent 93000 for XAUI, XGMII and XGXS 10Gbit/s network interface ASICs. Strong working knowledge of JTAG, Boundary Scan, BIST development tools and related DFT analysis tools. Developed manufacturing database using PDF Solution’s DataPower tools for the Cisco switching and routing business unit. Developed manufacturing database using Syntricity’s DataConductor tool for the Cisco wireless network business unit.
1998-2000 AGILENT Technologies, Applications Engineer
Semiconductor Applications Engineer. Responsible for technical applications for Agilent 83000, 93000, and 94000 ATE test systems. Supported applications include: Serdes chips, Sram and Dram applications with redundancy, Micro controllers, Graphics controllers, FIFO chips, and LAN applications. Additional responsibilities included high-speed signal board design, networking administration, prober driver development, and vector cyclization tools.
1994-1998 ADAPTEC Corporation, Test Engineer. (Continuous with Western Digital, division sold)
Responsible for the development of 1 Million plus gate VLSI and mixed signal programs on the LTX, the Credence Duo, the SC312, and the Teradyne Catalyst, and J971 test platforms. Experienced with the translation of test programs between platforms for production. Directly involved in wafer fabrication and test yield issues including first silicon characterization. Also responsible for test research in emerging technologies, including Gbit vector development, production jitter analysis, and solutions for 2Gbit+ serial drivers using low speed ATE resources.
1994-1996 Western Digital Corporation, Product Engineer
Responsible for the transfer to production of digital and mixed signal VLSI micro controllers for mass storage applications. Directly involved with all wafer fabrication and test yield issues. Responsibilities include the development of device test programs for LTX and Credence test platforms. Additional responsibilities include interfacing with F/A, and Test groups to meet business goals.
1992-1994 Camsco Engineering, Test Engineer
Responsible for developing computer based data acquisition systems and automated duration testing procedures. Designed and constructed test equipment including hardware development and software support. Developed PC based RF sensor equipment for on site field-testing. Performed quality audits, product reliability studies and customer satisfaction surveys.
Education Summary: Mar. 1994 Bachelor of Science in Physics with an emphasis in Physics-Engineering. California State Polytechnic University, Pomona, CA.
Test Engineer; 93k, J750, Catalyst, Advantest, Eagle, LTX